Micron G11 NAND: Density and Speed Doubling by Late 2027

Micron plans to double the storage density of its 3D NAND flash memory by the second half of 2027. The upcoming G11 generation will offer roughly twice the capacity of the current G9 line while reducing the energy required to transfer data by more than 25%. These improvements are designed to make high-capacity solid-state drives more efficient for both consumer devices and data centers, particularly those handling artificial intelligence workloads.

The shift follows a multi-year push to optimize memory architecture. Micron has relied on CMOS-under-array designs for several generations, but the new technology moves to wafer-on-wafer bonding. This process allows engineers to manufacture the memory array and the peripheral circuitry on separate wafers, each using a process best suited for that specific function, before bonding them together. The approach mirrors a method already employed by Chinese rival YMTC.

Scott DeBoer, Micron’s president and chief technology and products officer, confirmed the bonding strategy at a company event this week. He stated that the timing is right for the technology, noting that the company had previously pledged to adopt it when it became cost-effective. DeBoer described G11 as the world’s most advanced NAND, emphasizing that the design will exceed 400 layers, though the exact count remains undisclosed.

Performance metrics for the G11 chips show a substantial increase over the existing G9 generation. Micron projects that triple-level-cell density will rise from approximately 21 Gb/mm2 to 42 Gb/mm2. Input/output speeds are expected to climb by up to 50%, jumping from 3,600 MT/s to 5,400 MT/s. These figures position the new chips ahead of next-generation products from competitors Kioxia and Samsung, which are currently targeting lower density thresholds.

The company has not yet revealed the specific architectural details or the precise number of memory decks for the G11 series. However, Micron indicates that the design will feature an industry-leading memory cell pitch. This suggests that the density gain results from both an increase in layers and smaller cell dimensions. Management expects to share more technical specifics in 2027, as high-volume production nears.

Looking beyond the G11 launch, Micron outlines a roadmap focused on scaling in three dimensions. The company is developing high-mobility materials and ultra-dense cell architectures to improve transistor characteristics and lower power consumption. DeBoer stated that the focus remains on new materials and continued XYZ scaling, rather than relying on layer count alone. Micron has not disclosed specific targets or schedules for generations following G11.